1. Field of the Invention
The present invention relates to random access memories in general which are operable in both a conventional and a sequential mode in particular.
2. Description of Prior Art
A conventional memory comprises a plurality of memory cells. Typically, for purposes of addressing, the cells are functionally arranged in columns and rows. A column decoder and a row decoder are provided for decoding the address of each one of the cells. When a cell is so addressed, the contents of the cell are read out to a data output line or bus, or data from a data input line or bus is written into the cell.
In many computer operations data may be stored and retrieved from a predetermined sequence of cells in a memory, giving rise to the possible advantage that such cells can be addressed in a manner which reduces the time required to retrieve or enter data therefrom or thereto.
Heretofore, the high-speed sequential retrieval of data in a memory has generally been used only in dynamic memories as distinguished from conventional static memories, the latter typically being unable to utilize this technique.